The IC 24LC01/24LC02 uses the I2C addressing proto- col and 2-wire serial interface which includes a bidirec- tional serial data bus synchronized by a clock. Microchip 24LC02 EEPROM are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Microchip 24LC02 EEPROM. Description, Bit/Bit Serial EePROM Write Protect Memory Chips. Company, Pronics. Datasheet, Download 24LC02 datasheet. Quote. Find where to.
The SDA pin is bidirectional for serial data transfer.
24LC02 Datasheet(PDF) – Ceramate Technical
Stresses exceeding the range specified under “Absolute Daatsheet. Clock and data transition. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. The device is optimized for use in many industrial and com.
The higher data word address bits are not incremented, re- taining the memory page row location refer to Page write timing. Internally organized with 8-bit words, the 1K requires a 7-bit data word address for random word addressing.
Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. Instead, after the EEPROM ac- knowledges the receipt of the first data word, the microcontroller can transmit up to seven more data words.
Output Capacitance See Note. Search field Part name Part description. Internally organized with 8-bit words, the 2K requires an 8-bit data word address for random word addressing. These three bits must compare to their corresponding hard-wired input 24lc0. Upon receipt of this ad- dress, the EEPROM will again respond with a zero and then clock in the first 8-bit data word.
Datqsheet read operation is initi- ated if this bit is high and a write operation is initiated if this bit is low. Data Input Hold Time. During data transfer, the data line must remain stable whenever the clock line is high.
Characteristics Functional Description Timing Diagrams. Input Capacitance See Note. For relative timing, refer ddatasheet timing diagrams.
Partial datasheeet write allowed. After receiving the 8-bit data word, the EEPROM will output a zero and the address- ing device, such as a microcontroller, must terminate the write sequence with a stop con- dition. Data Input Setup Time.
After this period the first clock pulse is generated. This happens during the ninth clock cycle. If ddatasheet device is still busy with the.
The pin is open-drain driven and may be wired-OR with any number of other open-drain or open collector devices. The microcontroller must terminate the page write sequence with a stop condition.
Commerical temperature range 0. Data transfer may be initiated only when the.
Serial clock data input. Hardware controlled write protection. The device address word consist of a mandatory one, zero sequence for the first four most significant bits refer to the diagram show- ing the Device Address.
Write operation with built-in timer. Since the datashee will not acknowledge during a write cycle, this can be used to determine when the cycle is complete this feature can be used to maximize bus throughput.
A page write is initiated the same as byte write, but the microcontroller does not send a stop condition after the first data datashet is clocked in.
These are stress ratings only. Time in which the bus must be free before a new transmission can start. Output Valid from Clock.
A write operation requires an 8-bit data word address following the device address word and acknowledgment. If not, the chip will return to a standby state.
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